- Giovanni Agosta, POLIMI, IT
- João M.P. Cardoso, UPorto, PT
- William Fornanciari, POLIMI, IT
- Michael Hübner, Brandenburg UT, DE
- Cristina Silvano, POLIMI, IT
- Dimitrios Soudris, NTUA, GR
- Jeronimo Castrillon, TU Dresden, DE
- Alessandro Cilardo, University of Naples Federico II, IT
- Biagio Cosenza, University of Salerno, IT
- Andrés Goens, University of Edinburgh, UK
- Kim Gruettner, OFFIS, DE
- Frank K. Gürkaynak, Microelectronic Design Center - ETH Zürich, CH
- Carles Hernandez Luz, Universitat Politècnica de València, ES
- Raquel Lazcano, Università degli Studi di Sassari, IT
- Francesco Leporati, University of Pavia, IT
- Daniel Madroñal, Università degli Studi di Sassari, IT
- Luigi Pomante, University of L'Aquila, IT
- Mario Porrmann, Osnabrueck University, DE
- Marco Procaccini, University of Siena, IT
- Alfonso Rodriguez, Universidad Politécnica de Madrid, ES
- Benjamin Rouxel, University of Amsterdam, NL
- Ruben Salvador, CentraleSupélec - IETR, FR
- Leonel Sousa, Universidade de Lisboa, PT
- Sander Stuijk, Eindhoven University of Technology, NL
- Massimo Torquati, University of Pisa, IT
- Sotirios Xydis, National Technical University of Athens, GR
- Vittorio Zaccaria, Politecnico di Milano, IT
Budapest, HU, NEW DATE: 22/06/2022
Co-located with HiPEAC
This workshop will follow the HiPEAC presentation format. We attempt to organise this workshop in presence at the specified location. We are committed to pursue safety of our presenters and attendees at all time and we will always comply with local COVID-related safety regulations at the time of the event.
Scope of the Workshop
The current trend towards many-core and the emerging accelerator-based architecture requires a global rethinking of software and hardware design, which turn out to be more than ever before strongly entangled.
The PARMA-DITAM workshop focuses on many-core architectures, parallel programming models, design space exploration, tools and run-time management techniques to exploit the features and boost the performance of such (possibly heterogeneous, (re-)programmable and/or (re-)configurable) many-core processor architectures from embedded to high performance computing platforms and cyber physical systems.
The PARMA-DITAM workshop will have seven main topics:
- T1: Parallel programming models and languages, compilers and virtualization techniques
- T2: Runtime modelling, monitoring, adaptivity, and management
- T3: Runtime trade-off execution, power management, and memory management
- T4: Heterogeneous and reconfigurable many-core: architectures and design space exploration
- T5: Methodologies, design tools, and high level synthesis for many-core architectures
- T6: Parallel applications for many-core platforms
- T7: Case studies, success stories and applications applying T1-T6
23/11/2021 - 11:59 PM (UTC): Paper Submission Deadline 30/11/2021 - 11:59 PM (UTC): Paper Submission Deadline 25/12/2021 - 11:59 PM (UTC): Paper Submission Deadline 31/01/2022 - 11:59 PM (UTC): Paper Submission Deadline
- 11/02/2022 - 11:59 PM (UTC): NEW EXTENDED Paper Submission Deadline
19/12/2021: Acceptance Notification 16/01/2022: Acceptance Notification 21/02/2022: Acceptance Notification
- 11/03/2022: (EXTENDED deadline) Acceptance Notification
10/01/2022: Camera ready version of accepted papers for workshop proceedings 23/02/2022: Camera ready version of accepted papers for workshop proceedings 14/03/2022: Camera ready version of accepted papers for workshop proceedings
- 01/04/2022: (EXTENDED deadline) Camera ready version of accepted papers for workshop proceedings
Information for Authors:
Papers should be submitted electronically through the workshop website.
Electronic paper submission requires a full paper,
up to 6 double-column ACM format pages,
including figures and references.
See Camera Ready Submission Guidelines
for additional details.
Papers should be submitted in PDF format.
The review process will be double-blind.
Please use the following template when preparing your manuscript:
NEW (24/01/2022): For new submissions we also accept the OASIcs template, which will be required for the camera-ready. In this case, the page limit will be 10 pages single column excluding references and title page. The requirements for the camera-ready will be uniform for all accepted submissions. Accepted papers will be provided a DOI, and published online in the Dagstuhl OASIcs OpenAccess Series in Informatics.
Camera Ready preparation instructions:
The camera ready version of the accepted papers
should be submitted up to
10/01/2022 23/02/2022 14/03/2022 01/04/2022
and be prepared according to the guidelines summarized
in the following link:
Camera Ready Submission Guidelines.
Important! Only the OASIcs template is accepted for camera ready
Paper presentation: At least one author per accepted paper should present their work during the workshop. We invite authors of accepted papers to prepare presentations with slides. Each paper presentation is scheduled to last at most 15 minutes. Time slot includes: 10 min oral presentation + 3 min Q&A + 2 min technical setup & speaker introduction by Session chair. Presenters should provide a short (no more than 3 lines) biography introduction to be handed to the Session chair at the beginning of the Session. We additionally encourage presenters to prepare a PDF version of their slide to be uploaded on the workshop website.